πŸ”‹ SBT.mdb λ·°μ–΄
데이터 κΈ°μ€€: 2026-07-24 05:16:52

TB_TEST_ITEM

칩셋별 검사 ν•­λͺ©(μΈ‘μ • ν•­λͺ©) μ •μ˜

κΈ°λ³Έν‚€: CHIPSET_ID + ITEM_ID + TEST_CLASS_ID + ITEM_SEQ

검색 κ²°κ³Ό 3,798ν–‰ 쀑 1,251–1,300ν–‰ ν‘œμ‹œ (26/76 νŽ˜μ΄μ§€)
CHIPSET_ID πŸ”‘ ITEM_ID πŸ”‘ TEST_CLASS_ID πŸ”‘ ITEM_SEQ πŸ”‘ ITEM_NAME ITEM_UNIT CODE_TYPE UNION_ID BASIC_ID SUB_COMMAND CODE_DEFINE WRITE_ID WRITE_DATA CONVERT_VALUE TEMP_STORAGE MODIFY_PERSON MODIFY_DATE
422 (BQ40Z50) 42 2 36 Current Accuracy (Zero) mA B 0 6 0A 01210000 0 β€” β€” 0 Thuy TC 20160605133831
422 (BQ40Z50) 44 2 37 Current Accuracy (CHA) mA B 0 6 0A 01210000 0 β€” β€” 15 Thuy TC 20160605133831
422 (BQ40Z50) 45 2 38 Current Accuracy (DCHA) mA B 0 6 0A 01210000 0 β€” β€” 20 Thuy TC 20160605133831
422 (BQ40Z50) 46 2 39 Cycle Count num B 0 6 17 01510000 0 β€” β€” 0 Thuy TC 20160605134253
422 (BQ40Z50) 47 2 40 FCC (mAh) mAh B 0 6 10 01510000 0 β€” β€” 0 Thuy TC 20160605133902
422 (BQ40Z50) 48 2 41 RSOC % B 0 6 0D 01510000 0 β€” β€” 0 Thuy TC 20160605133902
422 (BQ40Z50) 49 2 42 At Rate β€” B 0 6 04 01510000 0 β€” β€” 0 Thuy TC 20160605134253
422 (BQ40Z50) 50 2 43 RCA β€” B 0 6 01 01510000 0 β€” β€” 0 Thuy TC 20160605134253
422 (BQ40Z50) 66 1 11 Mid Tab Test-D mR U 8 0 07 3NN10000 0 β€” β€” 0 LDNghia 20170220134141
422 (BQ40Z50) 69 1 12 Voltage Accuracy (DVM - SMBus) β€” U 13 0 0C 3NN10000 0 β€” β€” 0 LDNghia 20160606111827
422 (BQ40Z50) 70 1 13 Voltage Deviation (MaxV - MinV) β€” U 14 0 0D 3NN10000 0 β€” β€” 0 LDNghia 20160606111827
422 (BQ40Z50) 73 1 14 Temperature Pack 'C U 15 0 0E 3NN40000 0 β€” β€” 0 LDNghia 20160606104349
422 (BQ40Z50) 74 1 15 Enable FETcontrol β€” U 16 0 0F 3NN10000 0 β€” β€” 0 LDNghia 20160606114547
422 (BQ40Z50) 76 1 16 Instruction Flash Signature β€” U 17 0 10 3NN10000 0 β€” β€” 0 LDNghia 20160606132722
422 (BQ40Z50) 77 1 17 Static DF Signature β€” U 18 0 11 3NN10000 0 β€” β€” 0 LDNghia 20160606132815
422 (BQ40Z50) 78 1 18 Static Chem DF Signature β€” U 19 0 12 3NN10000 0 β€” β€” 0 LDNghia 20160606132835
422 (BQ40Z50) 80 1 19 Check Seal β€” U 20 0 13 3NN60000 0 β€” β€” 0 LDNghia 20160606152241
422 (BQ40Z50) 81 1 20 FET CD (off,off)_CHA β€” U 21 0 14 3NN10000 0 β€” β€” 0 LDNghia 20160606191552
422 (BQ40Z50) 82 1 21 FET CD (off,off)_DCHA β€” U 22 0 15 3NN10000 0 β€” β€” 0 LDNghia 20160606191552
422 (BQ40Z50) 83 1 22 SEAL β€” U 23 0 16 3NN10000 0 β€” β€” 0 LDNghia 20160606193152
422 (BQ40Z50) 85 1 23 Read H/P Barcode (CT Lable) β€” U 25 0 18 3NN00000 0 β€” β€” 0 TXDinh 20160608191055
422 (BQ40Z50) 86 1 24 Write H/P Barcode (CT Lable) β€” U 24 0 17 3NN00000 0 β€” β€” 0 TXDinh 20160608192912
422 (BQ40Z50) 89 1 25 Read IR Pack β€” B 0 47 00 20210000 0 β€” β€” 0 LDNghia 20160608152809
422 (BQ40Z50) 92 1 26 Current Accuracy (CHA) β€” U 26 0 19 3NN10000 0 β€” β€” 15 LDNghia 20161123211115
422 (BQ40Z50) 93 1 27 Current Accuracy (DCHA) β€” U 27 0 1A 3NN10000 0 β€” β€” 20 LDNghia 20161123211115
422 (BQ40Z50) 94 1 28 Cancel PF β€” U 28 0 1B 3NN10000 0 β€” β€” 0 LDNghia 20161123215848
422 (BQ40Z50) 95 1 29 Current 0A β€” U 29 0 1C 3NN10000 0 β€” β€” 0 LDNghia 20161123215848
422 (BQ40Z50) 96 1 30 Current_10mA β€” U 32 0 1E 3NN10000 0 β€” β€” 0 LDNghia 20161123220633
422 (BQ40Z50) 97 1 31 Pack date write β€” U 30 0 1D 3NN00000 0 β€” β€” 0 LDNghia 20161123221331
422 (BQ40Z50) 98 1 32 IR Pack β€” U 33 0 1F 3NN10000 0 β€” β€” 0 LDNghia 20161124083306
422 (BQ40Z50) 99 1 33 Temperature (Ref) β€” B 0 48 00 20410000 0 β€” β€” 5 LDNghia 20170324150602
422 (BQ40Z50) 100 1 34 Mis Tab Test mV U 35 0 21 3NN10000 0 β€” β€” 0 LDNghia 20170308105745
422 (BQ40Z50) 102 1 35 Temperature (Ref) β€” U 34 0 20 3NN10000 0 β€” β€” 5 LDNghia 20170324221406
422 (BQ40Z50) 103 1 36 Temperature Pack β€” U 36 0 22 3NN10000 0 β€” β€” 0 LDNghia 20170324220721
461 (Apple-test) 3 2 1 RSOC % B 0 6 0D 01510000 0 β€” β€” 0 jun wang 20120823153324
461 (Apple-test) 4 2 2 Cycle count cyc B 0 6 17 01510000 0 β€” β€” 0 jun wang 20120823153341
461 (Apple-test) 1 1 1 Mid Tab check β€” U 3 0 03 3NN10000 0 β€” β€” 0 jun wang 20120823145327
461 (Apple-test) 2 1 2 Temperature β€” U 4 0 04 3NN10000 0 β€” β€” 0 jun wang 20120823153454
481 (BQ77PL900) 14 2 1 WAKEUP OFF β€” B 0 1 FF 4NN00000 0 β€” β€” 0 wenqi bian 20130204094647
481 (BQ77PL900) 15 2 2 WAKE UP 24V β€” B 0 1 FF 4NN00000 0 β€” β€” 0 wenqi bian 20130204094647
481 (BQ77PL900) 16 2 3 UVPR β€” B 0 1 FF 4NN00000 0 β€” β€” 0 wenqi bian 20130204094647
481 (BQ77PL900) 17 2 4 UVP-D FET β€” B 0 1 FF 4NN00000 0 β€” β€” 0 benhua huang 20130226091616
481 (BQ77PL900) 18 2 5 Themocouple Check β€” B 0 1 FF 4NN00000 0 β€” β€” 0 wenqi bian 20130204094647
481 (BQ77PL900) 19 2 6 Read Temp β€” B 0 1 FF 4NN00000 0 β€” β€” 0 wenqi bian 20130204094647
481 (BQ77PL900) 20 2 7 Read SOC β€” B 0 1 FF 4NN00000 0 β€” β€” 0 wenqi bian 20130204094647
481 (BQ77PL900) 21 2 8 Read Model Name β€” B 0 1 FF 4NN00000 0 β€” β€” 0 wenqi bian 20130204094647
481 (BQ77PL900) 24 2 9 Read FET mode β€” B 0 1 FF 4NN00000 0 β€” β€” 0 wenqi bian 20130204094647
481 (BQ77PL900) 31 2 10 Read H/W Version β€” B 0 1 FF 4NN00000 0 β€” β€” 0 benhua huang 20130418154035
481 (BQ77PL900) 32 2 11 Read Current β€” B 0 1 FF 4NN00000 0 β€” β€” 0 wenqi bian 20130204094647
481 (BQ77PL900) 33 2 12 Read Cell #7 Voltage β€” B 0 1 FF 4NN00000 0 β€” β€” 0 wenqi bian 20130204094647