πŸ”‹ SBT.mdb λ·°μ–΄
데이터 κΈ°μ€€: 2026-07-24 05:16:52

TB_UNION_CODE_MST

칩셋별 볡합(μ‘°ν•©) λͺ…λ Ή λ§ˆμŠ€ν„°

κΈ°λ³Έν‚€: CHIPSET_ID + UNION_ID

검색 κ²°κ³Ό 794ν–‰ 쀑 401–450ν–‰ ν‘œμ‹œ (9/16 νŽ˜μ΄μ§€)
CHIPSET_ID πŸ”‘ UNION_ID πŸ”‘ UNION_NAME HEX_SEQ DEC_SEQ COMMAND_COUNT WRITE_DATA_COUNT ACTION_CONTEXT MODIFY_PERSON MODIFY_DATE
422 (BQ40Z50) 5 FET CD (off,on)_CHA 04 4 5 4 (1) LDNghia 20160607112741
422 (BQ40Z50) 6 F/W Version 05 5 3 2 β€” long 20160603143215
422 (BQ40Z50) 7 Shutdown 06 6 4 4 β€” Thuy TC 20160605132616
422 (BQ40Z50) 8 Mid Tab Test-D 07 7 3 0 #(1,2,3) long 20160604174019
422 (BQ40Z50) 9 Bank IR 1 08 8 3 0 *(/(#(1,2),3),?(1000)) long 20160604173712
422 (BQ40Z50) 10 Bank IR 2 09 9 3 0 *(/(#(1,2),3),?(1000)) long 20160604195120
422 (BQ40Z50) 11 Bank IR 3 0A 10 3 0 *(/(#(1,2),3),?(1000)) long 20160604195214
422 (BQ40Z50) 12 Current Sum 0B 11 2 0 -(1,2) long 20160604173146
422 (BQ40Z50) 13 Voltage Accuracy (DVM - SMBus) 0C 12 2 0 #(1,2) LDNghia 20160606114944
422 (BQ40Z50) 14 Voltage Deviation (MaxV - MinV) 0D 13 3 0 #(1,2,3) long 20160604195935
422 (BQ40Z50) 15 Temperature Pack 0E 14 2 0 J(1)(2) LDNghia 20170324151019
422 (BQ40Z50) 16 Enable FETcontrol 0F 15 2 2 β€” LDNghia 20160606114356
422 (BQ40Z50) 17 Instruction Flash Signature 10 16 3 2 β€” LDNghia 20160606132518
422 (BQ40Z50) 18 Static DF Signature 11 17 3 2 β€” LDNghia 20160606132535
422 (BQ40Z50) 19 Static Chem DF Signature 12 18 3 2 β€” LDNghia 20160606132549
422 (BQ40Z50) 20 Check Seal 13 19 1 1 β€” LDNghia 20160607123209
422 (BQ40Z50) 21 FET CD (off,off)_CHA 14 20 2 2 β€” LDNghia 20160606191324
422 (BQ40Z50) 22 FET CD (off,off)_DCHA 15 21 2 2 β€” LDNghia 20160606191357
422 (BQ40Z50) 23 SEAL 16 22 2 2 β€” LDNghia 20160606193124
422 (BQ40Z50) 24 Write H/P Barcode (CT Lable) 17 23 2 2 β€” LDNghia 20170323081120
422 (BQ40Z50) 25 Read H/P Barcode (CT Lable) 18 24 1 0 β€” LDNghia 20160607113917
422 (BQ40Z50) 26 Current Accuracy (CHA) 19 25 3 2 β€” LDNghia 20161214103607
422 (BQ40Z50) 27 Current Accuracy (DCHA) 1A 26 3 2 β€” LDNghia 20161209161624
422 (BQ40Z50) 28 Cancel PF 1B 27 4 4 β€” LDNghia 20161123215151
422 (BQ40Z50) 29 Current 0A 1C 28 2 1 β€” LDNghia 20161123215239
422 (BQ40Z50) 30 Pack date write 1D 29 1 1 β€” LDNghia 20161123221424
422 (BQ40Z50) 32 Current_10mA 1E 30 3 0 β€” LDNghia 20161123220136
422 (BQ40Z50) 33 IR Pack 1F 31 6 3 /(+(1,2,3),(?3)) LDNghia 20161124083203
422 (BQ40Z50) 34 Temp fix 20 32 1 0 (?26) LDNghia 20170324221032
422 (BQ40Z50) 35 Mid Tab Test 21 33 1 0 MIDTAB(11,12,13,14,15,16,17,18,19,20) LDNghia 20170308105533
422 (BQ40Z50) 36 Temperature Pack(F) 22 34 1 0 J(?(26))(1) LDNghia 20170324220700
422 (BQ40Z50) 37 Shutdown DC 23 35 7 5 β€” LDNghia 20170412173757
461 (Apple-test) 1 Seal 01 1 2 2 β€” jun wang 20120823140319
461 (Apple-test) 2 Unseal 02 2 4 4 β€” jun wang 20120823140829
461 (Apple-test) 3 Mid Tab 03 3 1 0 β€” jun wang 20120823142716
461 (Apple-test) 4 Pack PCM Temperature 04 4 2 0 β€” jun wang 20120823143154
481 (BQ77PL900) 1 Wake Up_GP 01 1 16 10 Storage(1,2) benhua huang 20130201091732
481 (BQ77PL900) 2 Thermocouple Check 02 2 6 3 Deviation(2,1) benhua huang 20130103131721
481 (BQ77PL900) 3 Imbalance (7) 03 3 22 14 Imbalance(1,2,3,4,5,6,7) benhua huang 20130103143614
481 (BQ77PL900) 4 OTP 04 4 11 4 Storage(1,2,3,4) benhua huang 20130202093708
481 (BQ77PL900) 5 OCP 05 5 16 7 Storage(1,2,3,4) benhua huang 20130202094722
481 (BQ77PL900) 6 Storage View (1 To 5) 06 6 1 0 Storage(1,2,3,4,5) benhua huang 20130309104912
481 (BQ77PL900) 7 Storage View (6 To 7) 07 7 1 0 Storage(6,7) benhua huang 20130309105014
481 (BQ77PL900) 8 OVP_Bank 08 8 22 13 Storage(1,2,3,4,5) benhua huang 20130202105559
481 (BQ77PL900) 9 UVP_Bank 09 9 31 20 Storage(1,2,3,4,5) benhua huang 20130202111244
481 (BQ77PL900) 10 [HP] Read Voltage 0A 10 2 1 β€” benhua huang 20130103144013
481 (BQ77PL900) 11 [HP] Read IR 0B 11 2 1 β€” benhua huang 20130103144059
481 (BQ77PL900) 12 Wake Up Off 0C 12 1 1 β€” benhua huang 20130103144409
481 (BQ77PL900) 13 LED Check 0D 13 7 3 β€” benhua huang 20130202092827
5 (BQ20Z95) 1 Seal 01 1 2 2 β€” jie chen 20111010163802